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8-2 Intel® 460GX Chipset Software Developer’s Manual
Table 8-1. IHPC Configuration Register Space
DID VID
00h 80h
PCISTS PCICMD
04h 84h
CLASS RID
08h 88h
HDR MLT CLS
0Ch 8Ch
Base Address
10h 90h
14h 94h
18h 98h
1Ch 9Ch
20h A0h
24h A4h
28h A8h
SID SVID
2Ch ACh
30h B0h
34h B4h
38h B8h
Interrupt
Pin
Interrupt
Line
3Ch BCh
Miscellaneous
Configuration (RW)
Slot ID
40h C0h
Hot-Plug Features
44h C4h
Arbiter
SERR
status
Power
Fault
SERR
status
Switch
Change
SERR
status
48h C8h
4Ch CCh
Memory Access Index
50h D0h
Memory Mapped Register Access Port
54h D4h
58h D8h
5Ch DCh
60h E0h
64h E4h
68h E8h
6Ch ECh
70h F0h
74h F4h
78h F8h
7Ch FCh
NOTE: The first 64 bytes are predefined in the PCI specification. All other locations are defined specifically for the
component of interest.