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Intel® 460GX Chipset Software Developer’s Manual 2-37
Register Descriptions
Once configured to count, all counters in the SAC and each PXB can be (nearly)
simultaneously started and stopped using a separate enable.
1:0 Reload Mode
Reload has priority over increment. That is, if a Reload event and a count event happen
simultaneously, the count event has no effect.
2.5.3.3 PME[1:0]: Performance Monitoring Event Selection
Address Offset: E8 - EBh Size: 16 bits each
Default Value: 0000h each Attribute: Read/Write
The PME registers specify the particular event to track in the performance monitoring counters.
The PXB supports tracking of PCI bus transactions (both specific and generic), and PCI bus signal
assertion. Bus transactions may be qualified by the originating agent and transaction destination.
Accumulated event counts are held in the PMD registers, while the PMR registers specify the
action to performed on event detection.
Bits
Description
15 reserved (0)
14 Count Data Cycles
1: Count data cycles associated with selected event
0: Count the selected event
13:10 Initiating Agent Selection
This field qualifies the tracking of bus transactions by limiting event detection to those
transactions issued by specific agents. That is, unless otherwise noted for the specific
event selected (below), the agent initiating the bus transaction must match the selection
specified here for the transaction to be tracked.
Note: This field is applicable only if the PCI bus is operated in internal-arbiter mode. If the bus is
operated using an external arbiter, this field must be set to Any Agent to trigger any events.
9:8 Transaction Destination Selection
This field qualifies the tracking of bus transactions by limiting event detection to those
transactions directed to a specific resource. That is, unless otherwise noted for the
specific event selected (below), the source or destination of the data must match the
selection specified here for the transaction to be tracked.
7:6 reserved
0 Never Reload
1 Reload when this counter overflows.
2 Reload when the other counter overflows.
3 Reload unless the other counter increments.
0000 Agent 0 1000 reserved
0001 Agent 1 1001 reserved
0010 Agent 2 1010 reserved
0011 Agent 3 1011 reserved
0100 Agent 4 1100 reserved
0101 Agent 5 1101 South bridge
0110 reserved 1110 460GX chipset agent (i.e.
outbound)
0111 reserved 1111 Any agent
00 any 10 PCI Target
01 Main Memory 11 Parallel Segment Peer