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SILICON GATE MOS
8255
8255 BASIC
FUNCTIONAL
DESCRIPTION
General
The
8255
is
a Programmable Peripheral Interface (PPI) de-
vice designed
for
use in 8080
Microcomputer
Systems. Its
function
is
that
of
a general
purpose
I/O
component
to
inter-
face peripheral
equipment
to
the
8080
system
bus.
The
functional
configuration
of
the
8255
is
programmed
by
the
system
software
so
that
normally
no
external logic
is
nec-
essary
to
interface peripheral devices
or
structures.
Data
Bus
Buffer
This
3-state,
bi-directional, eight
bit
buffer
is
used
to
inter-
face
the
8255
to
the
8080
system
data
bus. Data
is
trans-
mitted
or
received
by
the
buffer
upon
execution
of
INput
or
OUTput
instructions
by
the
8080
cPU.
Control
Words
and
Status
information
are also transferred
through
the
Data
Bus
buffer.
Read/Write and Control
Logic
The
function
of
this
block
is
to
manage all
of
the
internal
and external
transfers
of
both
Data
and
Control
or
Status
words. It
accepts
inputs
from
the
8080 CPU Address and
Control busses and in
turn,
issues
commands
to
both
of
the
Control Groups.
Chip
Select: A
"low"
on
this
input
pin enables
the
com-
munication
between
the
8255 and
the
8080 CPU.
(RD)
Read: A II10w"
on
this
input
pin enables
the
8255
to
send
the
Data
or
Status
information
to
the
8080 CPU
on
the
Data Bus.
In
essence, it allows
the
8080
CPU
to
II
rea
d
from"
the
8255.
(WR)
Write: A
"low"
on
this
input
pin
enables
the
8080
CPU
to
write
Data
or
Control
words
into
the
8255.
(AO
and
A1)
Port Select 0
and
Port Select 1:
These
input
signals, in con-
junction
with
the
RD
and
WR
inputs,
control
the
selection
of
one
of
the
three
ports
or
the
Control Word Register.
They
are normally
connected
to
the
least significant bits
of
the
Address Bus (A
o
and A
1
).
8255 BASIC OPERATION
A1
AO
RD
WR
CS
INPUT
OPERATION
(READ)
0
0
0 1
0
PORT A
~
DATA
BUS
0
1
0 1
0
PORT
B
=>
DATA
BUS
1
0 0 1
0
PORT
C=>
DATA
BUS
OUTPUT
OPERATION
(WRITE)
0
0
1
0
0
DATA
BUS
=>
PORT A
0
1 1
0 0
DATA
BUS
=>
PORT B
1
0
1
0 0
DATA
BUS~
PORT C
1 1
1
0
0
DATA
BUS
=>
CONTROL
DISABLE
FUNCTION
X X X
X
1
DATA
BUS=>
3-STATE
1
1 0 1
0
ILLEGAL
CONDITION
8255 Block Diagram
5-114