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M (Decrement memory)
((H)
(L))
..-
((H)
(L))
- 1
The
content
of
the
memory location whose address
is
contained
in
the
Hand
L registers
is
decremented by
one. Note:
All
condition flags except
CY
are affected.
OAA (Decimal Adjust Accumulator)
The eight-bit number
in
the
accumulator
is
adjusted
to
form two four-bit Binary-Coded-Decimal digits
by
the following process:
1.
If
the
value
of
the least significant 4 bits
of
the
accumulator
is
greater
than
9
or
if
the
AC flag
is
set, 6
is
added
to
the
accumulator.
Cycles:
States:
Addressing:
Flags:
3
10
reg. indirect
Z,S,P,AC
2.
If
the
value
of
the
most
significant 4 bits
of
the
accumulator
is
now greater
than
9,
or
if
the
CY
flag
is
set, 6
is
added
to
the
most significant 4
bits
of
the
accumulator.
NOTE:
All
flags are affected.
INX rp (Increment register pair)
(rh) (rl)
..-
(rh) (rl) + 1
The
content
of
the
register pair rp
is
incremented by
one. Note: No condition flags are affected.
Cycles:
States:
Flags:
o
1
4
Z,S,P,CY,AC
OCX
rp (Decrement register pair)
(rh) (rl)
..-
(rh) (rl) - 1
The
content
of
the
register pair rp
is
decremented by
one. Note: No condition flags are affected.
ANA r (AND Register)
(A)
~
(A)
/\
(r)
The
content
of
register r
is
logically anded with the
content
of
the accumulator.
The
result
is
placed
in
the
accumulator. The CY flag
is
cleared.
S
1
4
register
Z,S,P,CY,AC
a I s I s
Cycles:
States:
Addressing:
Flags:
Logical Group:
This group
of
instructions performs logical (Boolean)
operations on data
in
registers and memory and on condi-
tion flags.
Unless indicated otherwise, all instructions
in
this
group affect the Zero, Sign, Parity, Auxiliary Carry, and
Carry flags according
to
the
standard rules.
I 1
1
5
register
none
I 0 I
1
5
register
none
Cycles:
States:
Addressing:
Flags:
Cycles:
States:
Addressing:
Flags:
DAD rp (Add register pair
to
Hand
L)
(H)
(L)
..-
(H)
(L) + (rh) (rl)
The
content
of
the
register pair rp
is
added
to
the
content
of
the
register pair
Hand
L. The result
is
placed
in
the
register pair
Hand
L.
Note: Only
the
CY
flag
is
affected. It
is
set if there
is
a carry
out
of
the
double precision add; otherwise it
is
reset.
.ANA
M (AND memory)
(A)
~
(A)
/\
((H)
(L))
The
contents
of
the
memory location whose address
is
contained
in
the
Hand
L registers
is
logically anded
with
the
content
of
the
accumulator.
The
result
is
placed
in
the
accumulator. The
CY
flag is cleared.
I 0 I 1
a a
I 1
, 1
I a
Cycles:
States:
Addressing:
Flags:
3
10
register
CY
Cycles:
States:
Addressing:
Flags:
2
7
reg. indirect
Z,S,P
,CY
,AC
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