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SILICON GATE
MOS
8080A-2
A.C.
CHARACTERISTICS
T
A
=
O°C
to
70°C,
Vee
=
+12V
± 5%,
VCC
=
+5V
±
5%,
V
ss
=
-5V
±
5%,
Vss
=
OV,
Unless Otherwise Noted
Symbol
Parameter
Min.
Max.
Unit Test Condition
tCy[31
Clock Period
.38
2.0
/lsec
t
r
,
tf
Clock Rise
and
Fall
Time
0 50
nsec
t¢1
(j>1
Pulse
Width
60
nsec
!¢2
l/>2
Pulse
Width
175
nsec
t01
Delay
(j>1
to
(j>2
0 nsec
t02
Delay
<P2
to
<P1
70 nsec
t03
Delay
~
to
(j>2
Leading
Edges
70
nsec
tOA [2]
Address
Output
Delay From
(j>2
175
nsec
}
CL
= 100pf
too
[2]
Data
Output
Delay From
(j>2
200
nsec
toc
[2]
Signal
Output
Delay From ¢1,
or
(/>2
(SYNC,
WR,WAIT,
HLOA)
120 nsec
}C
L
=50pf
tOF
[2]
DSIN
Delay From
lP2
25
140
nsec
tOI[1]
Delay
for
Input
Bus
to
Enter
Input
Mode
tOF
nsec
tOS1
Data Setup
Time
During
lP1
and
DBIN
20
nsec
TIMING WAVEFORMS [14]
(Note:
Timing
measurements
are
made
at the
following
reference voltages: CLOCK
"1"
= 8.0V
"0"
= 1.0V; INPUTS
"1"
= 3.3V,
"0"
= 0.8V; OUTPUTS
"1"
=2.0V,
"0"
=0.8V.)
'II
t
CY
-I
-.
to,
~
--.
ift.,
~1
J
f\
r~
}\
71\
-4-
t<t>2----'1
4~
}~
~
....
-ll
~J-
~I-
-
""
<1>2
~r-
J
~
i
~H
...
to3~1
--.1
t
02
.-
--
----
------
----
~
tAW--++---~·1
f4--t
OO
-'
)
~A!.A_O~T
_,
iIIf--
t
ow
,---.
-=t
---
.
.
-.
t
oc
1.-
~
t
oc
I-+--
-t-1P--------+~\1
OBIN
/I-\-
------------------+----11
......
---+o-----++---+--+--++----t+"--t
~tDF-.1
SYNC
---------
.......
"""1
--"i
A
1S
-A
o
---------
........
--
lr------
~tOA~
..-too-'I
~
to!
\.-
---l
toHI"'-
~
-~
IJ.....-......---H--.~...-
.x=
1-........
~,...OATA
IN @I
0
7
.0
0
---------oo+---....."rl-
....
------
--,...
.......
.J~-t--
,
.....
~
t
os1
1.-
~
~tOS2-'
READY
-X@
t
-;:r...
WAIT
tH_--.
__
~_;__
...
lIl
t
oc
--.
1..-
tH
-.1
1.-
HOLD
.-X@
IX
-----------------------------------------.
......
tr
~;
....
I~..,..I~-
..........
HLOA
-------------------------------------------,t"-f
_~LI~-"""""Ij,..
INT
~-----------------_-:-'Xr
~
~t
t,s!=-=
tH~
...
INTE
5-26