Intel 8080 Laptop User Manual


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INSTRUCTION SET
Summary of Processor Instructions
By
Alphabetical
Order
Instrumon Cod.lll
Clock
121
Illstrudion
Cod.(1)
C1cckl2J
Mnemonic
Desaiptioll
07
06
0
5
04
03
02
01
DO
Cychs
Mn.mollie
Description
07
06
05 04 03 02
01
Do
Cychs
ACI
Add
immediate
to
A
with
MVI
M
Move
immediate
memory
1 1 0 1 1
0
10
tarry
MVlr
Move
immediate
register
D D 0 1
1
0
7
AOC
M
Add
memory
to
A
with
tarry 1
0 0
0
1 1
7
MOVM.r
Move
register
to
memory
1
1 0
S S S 7
ADCr
Add
register
to
A
with
carry
1
0 0
D
1
S
4
MOVr,M
Move
memory
to
register
0 D 0
1 1
0
7
ADD
M
Add
memory
to
A
1
0 0 0 0 1 7
MOV
rt
,r2
Move
register
to
register
0 D 0
S
S S 5
AOOr
Add
register
to
A 1
0
0 0 0 S
4
NOP
No-operation
0 0 0
0 0 0 4
AOI
Add
immediate
to
A
1 1
0 0 0
1
7
DRAM
Or
memory
with
A
1 1
0 1 1
0 7
ANAM
And
memory
with
A
1 0 1
0
0
1
7
ORAr
Or
register
with
A
1 1
0 S
S S
4
ANAr
And
register
with
A 1
0
1
0
0 S
4
ORI
Or
immediate
with
A
1 1
0 1 1
0
7
ANI
And
immediate
with
A
1 1
1
0 0 1
7
OUT
Output
0
1
0 0
1
1
10
CALL
Call
ullCondi1ional
1 1
0 0 1 1
17
PCHL
H& L
to
program
counter
1
0
1
0
0
1
5
CC
Call
on
carry
1 1
0
1
1 1
11/17
POP
8
Pop
regi$ter
pair
a & C
off
0
0 0 0 0 1
10
CM
Call
on
minus
1 1
1 1 1
I
11/17
stick
Cl1A
Compliment
A
0 0
1
0 1 1
4
pop 0
Pop
register
pair
0 & E
off
10
CMC
Compliment
carry
0
0
1
1 1 1
4
stack
CMPM
Compare
memory
with
A
1
0
1 1
I 1
7
POP
H
Pop
register
pair
H& L
off
10
CMPr
Compare
register
with
A
1
0
1
1 1
S
4
stack
CNC
Call
on
no
carry
1
1
0
1
0 1
11/17
POP
PSW
Pop
A
and
Flags
10
CNZ
Call
on
no
lero
1 1
0
0 0 1
11/17
all
stack
CP
Call
on
positive
1 1 1 1
0 1
11/17
PUSH
8
Push
register
Pa
ir
8 & C
on
11
CPE
Call
on
parity
even
1 1 1
0
1
1
11/17
stack
CPI
Compare
immediate
with
A
1
1 1 1
1 1
7
PUSH
0
Push
register
Pair
0 & Eon
11
CPO
Call
on
parity
odd
1
1 1
0
0
1
11/17
stack
CZ
Call
OnltrO
1
1
0 0 1
1
11/17
PUSH
H
Push
register
Pair
H& L
on
11
DAA
Decimal
adjust
A
0 0 1 0
0
1
4
stack
DAD
a
Add
a & C
to
H& L
0
0 0 0 1
0
10
PUSH
PSW
Push
A
and
Flags
11
DAD
0
Add
0 & E
to
H& L
0 0 0 1 1
0
10
on
stack
DAD
H
Add
H& L
to
H& L
0
0
1
0 1
0
10
RAL
Rotlle A
left
through
carry
DAD
SP
Add
stack
pointer
to
H& L
0
0
1 1
1
0
10
RAR
Rolate
A
right
through
OCR
M
Decrement
memory
0 0
1
1
0
1
10
carry
OCR
r
Decrement
register
0 0 0
D 0 1
5
RC
Return
on
carry
0
1
1
0
5'11
DCX
8
Decrement
B& C
0
0 0
0
1
0
5
RET
Return
0
0
I
0
10
DCX
D
Decrement
0 & E
0 0 0 1
1
0 5
RLC
Rotate
A
left
0
0 0 1 4
OCX
H
Decrement
H& L
0 0 1
0 1
0
5
RM
Return
on
minus
1
1 1
0
5'11
OCXSP
Decrement
stack
po
inter
0
0
1
1 1
0
5
RNC
Return
on
no
carry
0 1
0
0
5'11
01
Disable
Interrupt
1
1 1
1
0 0 4
RNZ
Return
on
no
lero
0
0 0
0
5'11
EI
Enable
Interrupts
I 1
1 1 1
0 4
RP
Relurn
on
positive
1
1
0
0
5111
HLT
Halt
0
1
1 1
0 1
0 7
RPE
Return
on
parity
even
1
0 1
0
5'11
IN
Input
1
1 0 1
1
0
1
10
RPO
Return
on
parity
odd
1
0 0
0
5'11
INR
M
Increment
memory
0
0
1 1
0 1
0
10
RRC
Rotate A
right
0 0
1
1
4
INR
r
I
ncrement
register
0
0
0 0
D 1
0 5
RST
Restart
A A A
1
11
INX8
Increment
a & C
registers
0 0
0 0
0 0 1 5
RZ
Return
on
lero
0 0 1
0
5'11
INX
0
Increment
0 & E
registers
0 0 0
1
0
0
1
5
SaB
M
Subtract
memory
Irom
A
0 1 1
1
7
INX
H
Increment
H& L
registers
0
0
1
0 0 0 1
5
with
borrow
INXSP
Increment
stack
pointer
0 0
1 1
0 0 1
5
SBa
r
Subtract
register
from
A
JC
Jump
on
carry
1 1
0
1
1
0 0
10
with
borrow
JM
Jump
on
minus
1 I
1
1 1
0 0
10
S81
Subtract
immediate
from
A
JMP
Jump
unconditional
1 1
0 0 0
0
1
10
with
borrow
JNC
Jump
on
no
carry
1 1
0
1
0 0 0
10
SHLO
Slore
H& L
direct
0
0
16
JNZ
Jump
on
no
lero
1 1
0
0 0 0 0
10
SPHL
H& L
to
stack
pointer
0
1 5
JP
Jump
on
positive
1 1 1 1
0 0 0
10
STA
Store
A
direct
0
0
13
JPE
Jump
on
parity
even
1
1 1
0
1
0 0
10
STAX
8
Slore
A
indirect
0
0
7
JPO
Jump
on
parity
odd
1 1
1
0
0 0 0
10
STAX
0
Store
A
indirect
0
0
7
JZ
Jump
onlero
1
1
0
0 1 0 0
10
STC
Sel
ClIrry
1
1 4
LOA
Load
A
direct
0 0 1 1
1
0 0
13
SUB
M
Subtract
memory
from
A
1
0 7
LOAXa
Load
A
indirect
0 0
0
0 1 0 0
7
SU8
r
Subtract
register
Ira
mA
S S 4
LOAX
0
Load
A
indirect
0
0 0 1 1
0
0 7
SUI
Subtrlct
immediate
from
A
1
0
7
LHLD
Load
H& Ldinct
0
0 1
0
1
0 0
16
XCHG
Exchange
0 &
E.
H& L
0
1 4
LXI8
Load
immediate
register
0
0 0 0
0 0
1
10
Registers
Pair
a & C
XRAM
Exclusive
Or
memory
with
A
LXIO
Load
immediate
register
10
XRA
r
Exclusive
Or
register
with
A
Pair
0 & E
XRI
Exclusive
Or
immediate
with
LXI
H
Load
immediate
register
10
A
Pair
H& L
XTHL
Exchange
to
p
01
stack,
H& L
18
LXI
SP
Load
immed
iate
steck
pointer
10
NOT
ES:
1.
0
DO
or
SSS -
000
B -
001
C -
010
0 - 011 E - 1
OOH
- 101 L - 110 Memory -
111
A.
2. Two possible cycle times,
(5/11) indicate instruction cycles
dependent
on
condition flags.
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