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SCHOTTKY BIPOLAR 8216/8226
APPLICATIONS OF
8216/8226
.
15
4
01
OlEN
3
0
0
2
DO
DB
OB
o
7
0
1
6
OB
1
5
9
8216
8226
10
D
2
11
OB
2
12
13
DB
3
0
3
14
cs
SYSTEM
8080
OATA
15
BUS
01
OlEN
3
D
4
OB
OB
4
DO
6
Os
DB
s
8216
8226
10
0
6
OB
6
0
7
13
DB
7
CS
The
8216/8226
can be used
in
a wide variety
of
other
buf-
fering functions
in
microcomputer systems such as Address
Bus Drivers, Drivers
to
peripheral devices such as printers,
and
as
Drivers
for
long length cables
to
other
peripherals
or
systems.
8080 Data Bus
Buffer
The
8080
CPU
Data Bus
is
capable
of
driving a single TTL
load and
is
more
than
adequate for small, single board sys-
tems. When expanding such asystem
to
more
than
one board
to
increase I/O
or
Memory size,
it
is
necessary
to
provide a
buffer. The
8216/8226
is
a device
that
is
exactly fitted
to
this application.
Shown
in
Figure 2 are a pair
of
8216/8226
connected di-
rectly
to
the
8080
Data Bus and associated control signals.
The
buffer
is
bi-directional
in
nature and serves
to
isolate
the
CPU
data
bus.
On the system side, the
DB
lines interface
with
standard
semiconductor I/O and Memory
components
and are com-
pletely TTL compatible.
The
DB
lines also provide a high
drive capability (50mA) so
that
an extremely large system
can be dirven along with possible bus termination networks.
On the
8080
side
the
01
and
DO
lines are tied
together
and
are directly connected
to
the
8080
Data Bus for bi-directional
operation.
The
DO
outputs
of
the
8216/8226
have a high
voltage
output
capability
of
3.65
volts which allows direct
connection
to
the
8080
whose minimum
input
voltage
is
3.3 volts. It also gives a very adequate noise margin
of
350mV (worst case).
The DI
EN
inputs
to
8216/8226
is
connected directly
to
the
8080. OlEN
is
tied
to
DBIN so
that
proper bus flow
is
maintained, and
CS
is
tied
to
BUSEN
so
that
the
system
side Data Bus will be 3-stated when a Hold request has been
acknowledged during a
DMA
activity.
I/O
01
DO
OlEN
(2)
CS
8216
8226 (2)
BUSEN........
----~
MEMORY
01
DO
OlEN (2)
CS
8216
8226
(2)
Figure 2.
8080
Data Bus Buffer.
Memory
and
1/0 Interface
to
a Bi-directional Bus
In large microcomputer systems it
is
often
necessary
to
pro-
vide Memory and I/O with
their
own buffers and
at
the
same
time maintain a direct,
common
interface
to
a bi-directional
Data Bus.
The
8216/8226
has separated
data
in and data
out
lines
on
one side and a
common
bi-directional set
on
the
other
to
accomodate such a function.
Shown
in
Figure 3
is
an example
of
how
the
8216/8226
is
used
in
this
type
of
application.
The interface
to
Memory
is
simple and direct.
The
memories
used are typically Intel® 8102,
81
02A, 8101
or
8107B-4 and
have separate
data
inputs and
outputs.
The
DI
and
DO
lines
of
the
8216/8226
tie
to
them directly and
under
control
of
the
MEMR
signal, which
is
connected
to
the
DIEN input,
an interface
to
the
bi-directional Data Bus
is
maintained.
The interface
to
I/O
is
similar
to
Memory.
The
I/O devices
used are typically Intel® 8255s, and can be used for
both
input and
output
ports.
The
I/O R signal
is
connected di-
rectly
to
the
DI
EN
input so
that
proper
data
flow from
the
I/O device
to
the
Data Bus
is
maintained.
Figure 3. Memory and I/O Interface
to
a Bi-Directional Bus.
5-165