Intel 8080 Laptop User Manual


 
Tn+i
Tn+(i-1)
Tn
+3
Tn+2
Tn+1
~~~~t==p----~--·_-~---
,--~~-----+-----""'----"'~-+---"""
Tn
(1)
cP1
A15.0~
__
.1
RESET
INTERNAL
RESET
SYNC
-+-
..... .....
-+-
-/~-----~----
....
-_....I
DBIN
-+-----
.....
-----
.....
----
....
-----/~-----~----
....
-----I---.....I
STATUS
INFORMATION
(0
I I
11lWHEN
RESET SIGNAL
IS
ACTIVE,
ALL
OF CONTROL OUTPUT SIGNALS
WILL
BE
RESET
IMMEDIATELY
OR
SOME
CLOCK PERIODS LATER. THE RESET SIGNALMUST
BE
ACTIVE
FOR
A MINIMUM OF THREE CLOCK CYCLES. IN
THE ABOVE
DIAGRAM
N
AND
I
MAY
BE
ANY
INTEGER.
NOTE: ®
Refer
to
StatusWord Chart
on
Page
2·6.
Figure 2-13. Reset.
~.O
SYNC
DBIN
HOLD
HOLD F/F
(INTERNAL)
HLDA
INTE
INT
INT
F/F
(INTERNAL)
STATUS
INFORMATION
M1
TWH
TWH
TWH TWH
TWH
TWH
TWH
T1
T2
T3
.rL-
rL-
rL-..
rL..-
r\l.-
r\l.-
~
~
~
rL..-
_J\.
-fn.--.Jl.
J\..
_JrL
...
J\.
JrL
JL
--.Jl.
-JTl
-
---
-------
----
-
-~-
"
--IJ
l-FLO
FLOATING
I
-
---
"
1- _
...
- -
-
--
--
'-
-
--
:-
-
~
-
-
--
--
~
-
-
--
\...
~ST_
J 1
I
I \
I
I
L
II
\
I
/'~
J\;
\'
I
II
\
I
,
I
INHIBIT
INHIBIT
\
INT
HOLD
,)
,
\
0
K@
I
ATING
NOTE: ® Refer
to
StatusWord Chart
on
Page
2·6.
Figure 2-14. Relation between HOLD
and'INT
in
the
HALT State.
2-15