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SILICON GATE MOS
8255
Input
Control Signal Definition
STB (Strobe (nput)
A
"low"
on this
input
loads
data
into
the
input
latch.
IBF (Input
Buffer
Full F/F)
A "high"
on
this
output
indicates
that
the
data
has been
loaded into
the
input
latch;
in
essence, an
acknowledgement
ISF
is
set by
the
falling edge
of
the
STB
input
and
is
reset
by
the
rising edge
of
the
RD
input.
INTR
(Interrupt
Request)
A
"high"
on
this
output
can be used
to
interrupt
the
CPU
when an
input
device
is
requesting service. INTR
is
set by
the
rising edge
of
STB if IBF
is
a
"one"
and INTE
is
a
"one".
It
is
reset
by
the
falling edge
of
RD. This procedure
allows an
input
device
to
request service from
the
CPU
by
simply strobing its
data
into
the
port.
INTE
A
Controlled by
bit
set/reset
of
PC
4.
INTE B
Controlled
by
bit
set/reset
of
PC2.
MODE 1 (STROBED INPUT)
BASIC TIMING
IBF
(INPUT BUFFER FULL)
DATA
INPUT
INTERNAL
INPUT LATCH
INTR
Basic Timing
Input
5-121
MODE 1 (PORT A)
CONTROL
WORD
STB
A
IBF
A
INTRA
RD
I/O
MODE
1 (PORT
B)
Mode 1
Input
"""""""'..........,~
NO
PROTECTION
FOR
THISOPERATION
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