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CHAPTER 4 I/O PORTS
4.3.1 Registers of Port 3 (PDR3, DDR3, PUL3)
This section describes the registers associated with port 3.
■ Functions of Port 3 Registers
● Port 3 data register (PDR3)
The PDR3 register indicates the state of the pins. For a pin set to function as an output port, the same value
("0" or "1") as held by the output latch can be read from this register. If the pin is set to function as an input
port, however, its output latch value cannot be read from the register.
Note:
When a bit manipulation instruction (SETB, CLRB) is executed, the output latch values, not the value
states of the pins, are read; thus, output latch values, excepting those for bits to be manipulated, do not
change.
● Port 3 data direction register (DDR3)
The DDR3 register sets the I/O direction of each pin per bit.
When a bit of the DDR3 corresponding to a pin of port 3 is set to "1", the pin functions as an output port.
When the bit is set to "0", the pin functions as an input port.
Note:
Because the DDR3 register is write only, bit manipulation instructions (SETB, CLRB) do not apply.
● Setting a port pin to serve external interrupts
If a pin of port 3 is used as an external interrupt input pin, enable the external interrupt circuit operation and
set the pin to function as an input port.
When the pin is set in this mode, its output latch value has no significance.
● Setting the output from a peripheral enable
If a peripheral with an output pin is used, set the output enable bit of the peripheral enable.
Because the output from the peripheral has priority, the values set on the PDR3 and DDR3 registers in the
bit position corresponding to the output pin for the peripheral have no significance, regardless of the value
output from the peripheral and the output enabled.
● Setting the input to a peripheral enable
If a peripheral with an input pin is used, set the pin of port 3 for the input to the peripheral to function as an
input port. In this mode, the corresponding output latch value has no significance.