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CHAPTER 11 EXTERNAL INTERRUPT CIRCUIT 2 (LEVEL)
11.1 Overview of External Interrupt Circuit 2
External interrupt circuit 2 detects the predetermined level of a signal input to any of the
eight external interrupt pins and generates and issues an interrupt request to the CPU.
■ Functions of External Interrupt Circuit 2 (Level Detection)
External interrupt circuit 2 functions to detect an "L" level signal input to any of the external interrupt pins
and generate and issue an interrupt request to the CPU, thereby enabling recovery from standby mode and a
transition to normal operating state (main clock operation mode).
• External interrupt pins: Eight pins (P00/INT20
/AN4 to P03/INT23/AN7, P04/INT24 to P07/INT27)
• External interrupt triggering: Input of an "L" level signal to one of the above external interrupt pins
triggers an external interrupt.
• Interrupt control: An external interrupt 2 control register (EIE2) enables or disables external interrupt
inputs.
• Interrupt flag:Detection of the "L" level is indicated by an external interrupt request flag bit of the
external interrupt 2 flag register (EIF2).
• Interrupt request: An interrupt request is generated if the state of one of the above external interrupt pins
is "L" (IRQA).