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CHAPTER 4 I/O PORTS
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Block Diagram of Port 7
Figure 4.7-1 Block Diagram of Port 7
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Registers PDR7, DDR7, and PUL7 of Port 7
Registers PDR7, DDR7, and PUL7 are associated with port 7.
The bits of these registers correspond to the pins of port 7 in one-to-one correspondence.
Table 4.7-2 tabulates the correspondence between the pins and the bits of the port 7 registers.
DDR
Pch
Nch
PDR
PUL
Internal data bus
PDR read
PDR read
(when read-modify-write is
performed)
Output latch
PDR write
DDR write
PUL read
Stop mode (SPL = 1)
Pull-up resistor
Pin
Stop mode (SPL = 1)
PUL write
DDR read
Table 4.7-2 Correspondence between the Pins and the Bits of the Port 7 Registers
Port name Bits of associated registers and corresponding pins
Port 7
PDR7, DDR7, PUL7 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
Pin corresponding to bit - - - - - P72 P71 P70