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CHAPTER 17 FLASH MEMORY
17.2 Flash Memory Control Status Register (FMCS)
The flash memory control status register (FMCS), together with the flash memory
interface circuit, is used to write data to and erase data from the flash memory.
■ Flash Memory Control Status Register (FMCS)
Figure 17.2-1 Flash Memory Control Status Register (FMCS)
Address
0079
H
bit7
INTE
R/W
bit6
RDYINT
R/W
bit5
WE
R/W
bit4
RDY
R
bit3bit2 bit1 bit0 Initial value
000X----
B
WE
RDY
0
1
RDYINT
0
1
0
1
Unused bit
Reading / Writing has no effect.
Write enable bit
Disables data to be written into/erased from flash memory.
Enables data to be written into/erased from flash memory.
INTE
0
1
Causing an interrupt to the CPU to be generated bit
Enables an interrupt when data writing/erasing is completed.
Disables an interrupt when data writing/eras
ing is completed.
Flash memory operation state indication bit
Data is being written/erased.
Data writing/erasing has been completed.
(An interrupt request is generated.)
ReaDY bit
(for enabling data to be written into/erased from flash memory)
Data is being written or erased.
Data writing/erasing has been completed.
(Subsequent data can b
e written/erased.)
t
INST
: Instruction cycle
R/W : Readable/Writable
R : Read only
: Initial value