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CHAPTER 3 CPU
3.7.3 Stop Mode
This section describes the stop mode.
■ Operations Relating to Stop Mode
● Transition to stop mode
In stop mode, the oscillation frequency is stopped. Most functions stop storing data in the registers and
RAM used immediately before transition to stop mode.
The clock circuit stops oscillating, the peripheral functions and CPU stop operating, but the external
interrupt circuit continues to operate.
Writing "1" to the stop bit in the standby control register (STBC: STP) causes a transition to stop mode. At
that time, if the pin state setting bit (STBC: SPL) is "0", the states of the external pins are maintained. If the
pin state setting bit is "1", the states of the external pins are set to Hi-Z (the states of pins for which a pull-
up resistor is specified in the pull-up setting resistor are set to level "H").
An attempt to write "1" into the STP bit while an interrupt request is being generated fails, transition to stop
mode cannot made, and instructions are processed continuously. (Even after the interrupt is processed
completely, transition to stop mode is not made.)
For a transition to stop mode, prohibit the time-base timer interrupt request output (TBTC: TBIE = 0) when
necessary.
● Cancellation of stop mode
Stop mode is cancelled by a reset or external interrupt.
When a reset occurs in stop mode, the reset operation is performed after oscillation stabilization wait time.
pin states are initialized by the reset operation.
When an interrupt request with an interrupt level higher than 11
B
is generated in an external interrupt
circuit in stop mode, stop mode is cancelled regardless of the CPU interrupt enable flag (CCR: I) or
interrupt level bits (CCR: IL1 and IL0).
When stop mode is cancelled and oscillation stabilization wait time has expired, a normal interrupt
operation is performed. Then, if interrupts are acceptable, interrupt processing is performed. Otherwise, an
instruction following the instruction immediately before transition to stop mode is managed.
When an external interrupt cancels stop mode, part of the peripheral functions are restarted with data stored
before the beginning of sleep mode. Therefore, the initial interval of the interval timer and other similar
settings are rendered unknown. The peripheral functions must be initialized after returning from stop mode.
Note:
Among interrupts, only an interrupt request from the external interrupt circuit cancels the stop mode.