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APPENDIX B Overview of the Instructions
Note:
At byte transfer operation to A, the automatic transfer to T is represented by TL ← AL.
The operands in a multiple-operand instruction are stored in the order in which they are indicated in
MNEMONIC.
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Operation Instructions
Table B.4-2 List of Operation Instructions (1 / 4)
No. MNEMONIC ~ # Operation TL TH AH N Z V C OP CODE
1 ADDC A, Ri 3 1 (A) ← (A)+(Ri)+C - - - + + + + 28 to 2F
2 ADDC A, #d8 2 2 (A) ← (A)+d8+C - - - + + + + 24
3 ADDC A, dir 3 2 (A) ← (A)+(dir)+C - - - + + + + 25
4 ADDC A, @IX+off 4 2 (A) ← (A)+( (IX)+off)+C - - - + + + + 26
5 ADDC A, @EP 3 1 (A) ← (A)+( (EP) )+C - - - + + + + 27
6ADDCW A 3 1(A) ← (A)+(T)+C - - dH + + + + 23
7ADDC A 2 1(AL) ← (AL)+(TL)+C - - - + + + + 22
8 SUBC A, Ri 3 1 (A) ← (A)-(Ri)-C - - - + + + + 38 to 3F
9 SUBC A, #d8 2 2 (A) ← (A)-d8-C - - - + + + + 34
10 SUBC A, dir 3 2 (A) ← (A)-(dir)-C - - - + + + + 35
11 SUBC A, @IX+off 4 2 (A) ← (A)-( (IX)+off)-C - - - + + + + 36
12 SUBC A, @EP 3 1 (A) ← (A)-( (EP) )-C - - - + + + + 37
13 SUBCW A 3 1 (A) ← (T)-(A)-C - - dH + + + + 33
14 SUBC A 2 1 (AL) ← (TL)-(AL)-C - - - + + + + 32
15 INC Ri 4 1 (Ri) ← (Ri)+1 - - - + + + - C8 to CF
16 INCW EP 3 1 (EP) ← (EP)+1 - - - ---- C3
17 INCW IX 3 1 (IX) ← (IX)+1 - - - - - - - C2
18 INCW A 3 1 (A) ← (A)+1 - - dH + + - - C0
19 DEC Ri 4 1 (Ri) ← (Ri)-1 - - - + + + - D8 to DF
20 DECW EP 3 1 (EP) ← (EP)-1 - - - - - - - D3
21 DECW IX 3 1 (IX) ← (IX)-1 - - - - - - - D2
22 DECW A 3 1 (A) ← (A)-1 - - dH + + - - D0
23 MULU A 19 1 (A) ← (AL) x (TL) - - dH + + + + 01
24 DIVU A 21 1 (A) ← (T)/(AL), MOD → (T) dL00 00---- 11