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CHAPTER 1 OVERVIEW
• External interrupt 2 (level detection × 8 pins, 1 channel) has eight independent inputs and can be used
for wake-up from low-power consumption mode. (L level detection function is supported.)
● Low-power consumption modes (standby modes)
• Stop mode (The oscillation is stopped so that current consumption is minimal.)
• Sleep mode (The CPU is stopped so that the current consumption is reduced by one-third of normal
consumption.)
● Up to 26 pins of I/O ports
• General-purpose I/O ports (CMOS): 26 pins (4 of which can be used as N-ch open-drain I/O ports.)
● Wild registers
• 2-byte data at two addresses are available.
• When a specific address or data is used on a wild register, the data in the ROM area is changed.
● 16 KB Flash with read protection
• Once the protection code is written in the specified address, the FLASH content cannot be read by
parallel/serial programmer.