Fujitsu MB89202 Computer Hardware User Manual


 
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CHAPTER 6 WATCHDOG TIMER
6.3 Watchdog Control Register (WDTC)
The watchdog control register (WDTC) activates and clears the watchdog timer.
Watchdog Control Register (WDTC)
Figure 6.3-1 Watchdog Control Register (WDTC)
WTE3 WTE2 WTE1
WTE0
0
101
RESV
0
bit7 bit6 bit5 bit4 bit3bit2 bit1 bit0
0009
H
RESV
WTE3 WTE2
WTE1 WTE0
0---XXXX
B
R/W R/W R/W R/W R/W
Address
Initial value
Watchdog control bit
Starts the watchdog timer
(upon first writing after reset)
Clears the watchdog timer
(upon second or subsequent writing after a
reset)
Other than above
No operation
Reserved bit
Write "0" to this bit.
: Unused
R/W
: Readable/writable
X : Undefined
Table 6.3-1 Explanation of Functions of Each Bit in Watchdog Control Register (WDTC)
Bit name Description
bit7 RESV: Reserved bit Write "0" to this bit.
bit6
to
bit4
Unused bits
Undefined when it is read.
Writing values does not affect operation.
bit3
to
bit0
WTE3, WTE2,
WTE1, WTE0:
Watchdog control bits
Writing "0101
B
" activates (for first writing) or clears (for second
or subsequent writing) the watchdog timer.
Writing other than "0101
B
" does not affect operation.
Note:
These bits indicate "1111
B
" when read. Bit manipulation
instructions cannot be used.