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CHAPTER 17 FLASH MEMORY
Note:
The RDYINT and RDY bits cannot be changed at the same time. Create a program so that decisions are
made using one or the other of these bits.
Table 17.2-1 Explanation of Functions of Each Bit in the Flash Memory Control Status Register (FMCS)
Bit name Description
bit7
INTE:
Causing an
interrupt to the
CPU to be
generated bit
Bit causing an interrupt (IRQB) to the CPU to be generated when writing into or erasing
from flash memory is completed.
An interrupt (IRQB) to the CPU is generated when both the INTE bit and RDYINT bit
are "1". If the INTE bit is "0", no interrupt is generated.
bit6
RDYINT:
Flash memory
operation state
indication bit
Bit for indicating operation status of flash memory.
This bit is set to "1" when writing into or erasing from flash memory is completed. After
data has been written into or erased from flash memory and this bit has been set to "1",
subsequent data can be written into or erased from flash memory.
Writing "0" clears this bit with "0", while if "1" is written into this bit, it is ignored. This
bit is set to "1" upon the termination of the flash memory automatic algorithm (see
Section "17.3 Starting the Flash Memory Automatic Algorithm ". The read modifier
write (RMW) command always reads "1" from this bit.
bit5
WE:
Write enable bit
Bit for write-enabling flash memory areas.
When this bit is set to "1", a write instruction performed after a command sequence for a
section from C000
H
to FFFF
H
(see Section "17.3 Starting the Flash Memory Automatic
Algorithm ") is issued writes data into a flash memory area. When this bit is set to "0", no
write/erase signals are generated. This bit is used to start a command for writing data into
or erasing data from flash memory.
It is recommended that this bit be set to "0" to prevent data from being incorrectly written
into flash memory, whenever there is no data to be written or erased.
bit4
RDY:
ReaDY bit
Bit for status checking for writing data into or erasing data from flash memory.
No data can be written into or erased from flash memory while this bit is "0". However, a
read command, reset command, and suspend commands such as the sector erase suspend
command can be accepted while this bit is "0".
bit3
to
bit0
Unused bits
Reading / Writing for these bits have no effect.
1 machine cycle
Automatic algorithm
Termination timing
RDYINT bit
RDY bit