Fujitsu MB89202 Computer Hardware User Manual


 
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CHAPTER 8 8/16-BIT CAPTURE TIMER/COUNTER
Table 8.4-1 Explanation of Functions of Each Bit in Capture Control Register (TCCR)
Bit name Function
bit7
CPIF:
Capture edge detection
flag bit
This bit is set to "1" when the edge specified by EDGS1 and EDGS0 is
detected.
An interrupt request is output when this bit and the capture interrupt request
enable bit (CPIEN) are "1".
bit6
CFCLR:
Capture edge detection
flag clear bit
This bit is used to clear the capture edge detection flag.
When this bit is "1" at write, the capture edge detection flag is cleared. When
"0", the capture edge detection flag is not affected (remains unchanged).
bit5
CPIEN:
Capture interrupt request
enable bit
This bit is used to allow and prohibit interrupt request output to the CPU.
An interrupt request is output when this bit and the capture edge detection flag
bit (CPIF) are "1".
bit4
CCMSK:
Counter clear mask bit
(at capture operation)
The counter state when a capture match is detected is set.
When this bit is "0", the counter is cleared. When this bit is "1", the counter is
not cleared.
bit3
TCMSK:
Compare match counter
clear mask bit
The counter state when a compare edge is detected is set.
When this bit is "0", the counter is cleared. When this bit is "1", the counter is
not cleared.
bit2,
bit1
EDGS1 and EDGS0:
Capture mode enable/
edge detection selection
bits
These bits are used to allow and prohibit the capture function and select
capture edges.
When using the 8/16-bit capture timer/counter in the capture mode, set these
bits to a value other than "00
B
".
When the edge set by these bits is input, the capture edge detection flag bit
(CPIF) is set to "1".
bit0 RESV: Reserved bit
Even if this bit is set to "0" or "1", the operation is not affected. The value
previously written becomes the read value.