Fujitsu MB89202 Computer Hardware User Manual


 
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CHAPTER 9 12-BIT PPG TIMER
9.4.1 12-bit PPG Control Register 1 (RCR21)
The 12-bit PPG control register 1 comprises bits for count clock selection of the 12-bit
PPG timer and bits for setting the "H" width.
12-bit PPG Control Register 1 (RCR21)
Figure 9.4-2 12-bit PPG Control Register 1 (RCR21)
HSC5 to HSC0
XXXXXX
RCK1 RCK0
00
2 t
INST
01
4 t
INST
10
16 t
INST
1
1
256 t
INST
bit7 bit6 bit5 bit4 bit3bit2 bit1 bit0
0014
H
RCK1
RCK0 HSC5 HSC4 HSC3 HSC2
HSC1
HSC0
00000000
B
R/W R/W R/W R/W R/W R/W R/W R/W
R/W : Readable/Writable
:
Initial value
Address
Initial value
"H" width setting bits
Compare value for the "H" width of 12-bit PPG outputs.
Count clock selection bits
Table 9.4-1 Explanation of Functions of Each Bit in 12-bit PPG Control Register 1 (RCR21)
Bit name Function
bit7,
bit6
RCK1, RCK0:
Count clock
selection bits
These bits are used to select a count clock of the 12-bit PPG timer from four types of
internal count clocks.
bit5
to
bit0
HSC5 to HSC0:
"H" width setting
bits
These bits are used to set the number of counts corresponding to the "H" width of
12-bit PPG timer outputs (the compare value for the "H" width), and the contents of
these bits and the HSC6 to HSC11 bits of the RCR22 register are compared with a
count by the counter.