Barco 26-0313000-00 Projector User Manual


 
52 Encore Presentation System • User’s Guide • Rev 04
2. Hardware Orientation
Video Processors
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The figure below illustrates a close-up of the M/E connectors on the VP. Even though the
figure uses M/E 1’s board, all M/E connections are identical.
Figure 2-5. M/E Connectors, VP
On each M/E, three input connections are provided for layer A, three are provided for layer
B, and two “Link” connectors are provided for inter-Processor communications.
Following are descriptions of each M/E connector.
a) Analog Input A
One 15-pin D connector is provided for the input to the M/E’s Layer A — visually,
the lower priority of the two layers. Connect a VGA source directly, or connect the
output of a VGA router. This input can also be used for composite and component
video. See the “
M/E Input Notes” section on page 56 for additional information.
In Appendix A, see the “
Analog 15-pin D Connector” section on page 371 for
pinout details.
b) HD/SDI Input A
One BNC connector is provided for the HD/SDI input to Layer A. Connect an SDI
or HDTV source directly, or connect the output of an SDI or HDTV router. Refer to
the “
M/E Input Notes” section on page 56 for more information.
c) DVI Input A
One DVI-I connector is provided for both digital and analog inputs to the M/E’s
Layer A and background channel.
~ Digital — connect a digital graphics source directly, or connect the
output of a digital graphics router.
~ Analog — using the appropriate adapter cable, connect an analog VGA
source directly, or connect the output of a VGA router.
Refer to the “
M/E Input Notes” section on page 56 for important details on the use
of this connector’s analog component. In Appendix A, refer to the “
DVI-I
Connector Pinouts” section on page 370 for pinout details.
d) Source Link Out
One DVI connector is provided for the M/E’s Source Link Output. For wide
screen and multi-screen applications, this connector loops your inputs to the
next
VP or VPx in the chain. Because all analog and digital inputs reside in the digital
domain inside the VP, each “link” output loops inputs to the next VP’s scalers.
Hol
es
ANALOG
HD / SDI
DVI
INPUT 1A
Hol
es
ANALOG
HD / SDI
DVI
INPUT 1B
OUT INSOURCE LINK 1
a b c d e f g h
a) Analog Input A d) Source Link Out g) HD/SDI Input B
b) HD/SDI Input A e) Source Link In h) Analog Input B
c) DVI Input A f) DVI Input B