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FR81 Family
90 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 6 INSTRUCTION OVERVIEW
6.2
TYPE-K
It has 12-bit OP Code (OP), register designated field (Rj) and floating point register designated filed
(FRi). These are the instruction formats that have been added to FR81 Family CPU.
TYPE-L
It has 14-bit OP Code (OP) and 14-bit immediate data fields (o14/u14), floating point register
designated field (FRi). Immediate data fields are not used in some instructions. These are the
instruction formats that have been added to FR81 Family CPU.
TYPE-M
It has 16-bit OP Code (OP) and three floating point register designated fields (FRk, FRj, FRi). These
are the instruction formats that have been added to FR81 Family CPU.
MSB LSB
(n+0) OP Rj
(n+2) - FRi
MSB LSB
(n+0) OP o14/u14/-
(n+2) o14/u14/- FRi
MSB LSB
(n+0) OP
(n+2) - FRk/- FRj/- FRi/-