Fujitsu FR81 Computer Hardware User Manual


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FR81 Family
462 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
Index
Numerics
20-bit Addressing
20-bit Addressing Area & 32-bit Addressing Area
............................................................11
32-bit Addressing
20-bit Addressing Area & 32-bit Addressing Area
............................................................11
A
Access
Data Access.......................................................14
Program Access .................................................14
ADD
ADD (Add 4bit Immediate Data to Destination
Register).............................................105
ADD (Add Word Data of Source Register to
Destination Register) ...........................107
ADD2 (Add 4bit Immediate Data to Destination
Register).............................................109
ADDC
ADDC (Add Word Data of Source Register and Carry
Bit to Destination Register) ..................111
ADDN
ADDN (Add Immediate Data to Destination Register)
..........................................................113
ADDN (Add Word Data of Source Register to
Destination Register) ...........................115
ADDN2 (Add Immediate Data to Destination
Register).............................................117
Address Space
Address Space......................................................8
Addressing
20-bit Addressing Area & 32-bit Addressing Area
............................................................11
Addressing Formats
Addressing Formats............................................86
ADDSP
ADDSP (Add Stack Pointer and Immediate Data)
..........................................................119
Alignment
Word Alignment ................................................14
AND
AND (And Word Data of Source Register to Data
in Memory).........................................121
AND (And Word Data of Source Register to
Destination Register) ...........................123
ANDB
ANDB (And Byte Data of Source Register to Data
in Memory).........................................125
ANDCCR
ANDCCR (And Condition Code Register and
Immediate Data)..................................127
ANDH
ANDH (And Halfword Data of Source Register to
Data in Memory).................................129
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