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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 35
CHAPTER 3 PROGRAMMING MODEL
3.3
■ Floating point exception accumulative flag (ECF)
Floating point exception accumulative flag (ECF) is a 6-bit register that indicates the accumulative number
of occurrences of floating point calculation exceptions. It lies between bit 11 and bit 6 of the FPU control
register (FCR). Only a "0" can be written in the accumulative flags. The flag value will not be changed
when "1" is written in the accumulative flags. The write value is evaluated by bit.
Figure 3.3-26 shows the bit configuration of the floating point exception accumulative flag (ECF).
Figure 3.3-26 Floating point exception accumulative flag (ECF) Bit Configuration
The content of each bit are described below.
[bit11] D : D flag
This flag indicates that an unnormalized number has been entered while the unnormalized number
input exception is disabled (EEF:D=0). This is a accumulative flag.
[bit10] X : X flag
This flag indicates that the calculation result has become inexact while the inexact exception is
disabled (EEF:X=0). This is a accumulative flag.
[bit9] U : U flag
This flag indicates that an underflow has occurred in the calculation result while the underflow
exception is disabled (EEF:U=0). This is a accumulative flag.
[bit8] O : O flag
This flag indicates that an overflow has occurred in the calculation result while the overflow
exception is disabled (EEF:O=0). This is a accumulative flag.
[bit7] Z : Z flag
This flag indicates that a division by zero has occurred while the division-by-zero exception is
disabled (EEF:Z=0). This is a accumulative flag.
[bit6] V : V flag
This flag indicates that an invalid calculation has been carried out while the invalid calculation
exception is disabled (EEF:V=0). This is a accumulative flag.
bit9 bit8bit11 bit10 bit7 bit6
UXDOZV
Initial value
XXXXXX
B