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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 99
FR81 Family
CHAPTER 6 INSTRUCTION OVERVIEW
6.5
CALL:D Instruction
If Return Pointer (RP) is referred to based on Delay Slot Instruction of CALL:D Instruction, updated
content will be read based on CALL:D Instruction.
[Ex]
CALL:D Label ; Branching after updating of RP
MOV RP,R0 ; Execution result of RP of preceding CALL:D Instruction is transferred to
R0
6.5.3 Non-Delayed Branching Instructions
In case of Non-Delayed Branching Instructions, execution is carried out in the sequence of Instructions.
Instruction immediately after Branching Instruction is never executed before branching.
Branching Instructions without ":D" in mnemonic are Non-Delayed Branching Instructions. Next
instruction will be Non-Delayed Branching Instruction
JMP @Ri CALL label12 CALL @Ri RET
BRA label9 BNO label9 BEQ label9 BNE label9
BC label9 BNC label9 BN label9 BP label9
BV label9 BNV label9 BLT label9 BGE label9
BLE label9 BGT label9 BLS label9 BHI label9
Execution cycles of Non-Delayed Branching Instruction will be 2 cycles when Branching and 1 cycle when
not branching. Example of Non-Delayed Branching Instruction is given below.
; Sequence of Instructions
ADD R1,R2
BRA LABEL ; Branching Instruction
MOV R2,R3 ; Not executed
. . .
LABEL: ST R3,@R4 ; Branching Destination
Compared to Delayed Branching Instructions where NOP Instruction is placed in the Delay Slot, efficiency
of instruction code can be increased. Execution speed and Code Efficiency both can be realized by using
Delayed Branching Instruction when valid instruction can be placed in the Delay Slot and using Non-
delayed Branching Instruction otherwise.