Fujitsu FR81 Computer Hardware User Manual


 
CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 83
FR81 Family
CHAPTER 6 INSTRUCTION OVERVIEW
6.1
Immediate Data Transfer Instructions
These are the instructions to transfer immediate data to general-purpose registers and can transfer
immediate data of 8bit, 20 bit, and 32 bit.
Memory Load Instructions
These are the instructions to load from memory (including I/O) to general-purpose registers or dedicated
registers. They can transfer data length of 3 types namely, bytes, half-words and words and memory
addressing is register indirect.
During memory addressing of some Instructions, Displacement Register Indirect or Increment/Decrement
Register Indirect Address is possible.
Memory Store Instructions
These are the instructions to store from general-purpose register or dedicated register to memory (Including
I/O). They can transfer data length of 3 types namely, bytes, half-words and words and memory addressing
is register indirect.
During memory addressing of some Instructions, Displacement Register Indirect or Increment/Decrement
Register Indirect Address is possible.
Inter-register Transfer Instructions/Dedicated Register Transfer Instructions
These are the instructions to transfer data between general-purpose registers or a general-purpose register
and dedicated register.
Non-delayed Branching Instructions
These are the instructions that do not have delay slot and carry out branching, sub-routine call, interrupt and
return.
Delayed Branching Instructions
These are the instructions that have delay slot and carry out branching, sub-routine call, interrupt and
return. Delay slot instructions are executed when branching.
Direct Addressing Instructions
These are the instructions to transfer data between general-purpose register and memory (INCLUDING I/O)
or between two memories. Addressing is not register indirect but direct specification with operand of
instruction.
In some instructions, in combination with specific general-purpose registers, access is made in combination
with increment/decrement Register Indirect addressing.