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FR81 Family
82 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 6 INSTRUCTION OVERVIEW
6.1
6.1 Instruction System
FR81 Family CPU has the integer type instruction of upward compatibility with FR80
Family and floating point type instruction executed by FPU.
6.1.1 Integer Type Instructions
Integer type instructions, in addition to instruction type of general RISC CPU, is also compatible with
logical operation optimized for embedded use, bit operation and direct addressing instructions.
Integer type instructions of FR81 Family CPU can be divided into the following 15 groups.
● Add/Subtract Instructions
These are the Instructions to carry out addition and subtraction between general-purpose registers or a
general-purpose register and immediate data. They also enable computation with carry used in multi-word
long computation or computations where flag value of Condition Code Register (CCR) convenient for
address calculation is not changed.
● Compare Instructions
These are the Instructions to carry out subtraction between general-purpose registers or a general-purpose
register and immediate data and reflect the results in the flag of Condition Code Register (CCR).
● Logical Calculation Instructions
These are the Instructions to carry out logical calculation for each bit between general-purpose registers or
a general-purpose register and memory (including I/O). Logical calculation types are logical product
(AND), logical sum (OR), and exclusive logical sum (EXOR). Memory addressing is register indirect.
● Bit Operation Instructions
These are the Instructions to carry out logical calculation between memory (including I/O) and immediate
value and operate directly for each bit. Logical calculation types are logical product (AND), logical sum
(OR), and exclusive logical sum (EXOR). Memory addressing is register indirect.
● Multiply/Divide Instructions
These are the instructions to carry out multiplication and division between general-purpose register and
multiplication/division result register. There are 32 bit × 32 bit, 16 bit × 16 bit multiplication instructions
and step division instructions to carry out 32 bit ÷ 32 bit division.
● Shift Instructions
These are the instructions to carry out shift (logical shift, arithmetic shift) of general-purpose registers. By
specifying general-purpose register or immediate data, shift (Barrel Shift) of multiple bits can be specified
at once.