Fujitsu FR81 Computer Hardware User Manual


 
FR81 Family
346 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.133
7.133 MUL (Multiply Word Data)
Multiplies the word data in Rj by the word data in Ri as signed numbers, and stores the
resulting signed 64-bit data with the higher word in the multiplication/division register
(MDH), and the lower word in the multiplication/division register (MDL).
Assembler Format
MUL Rj, Ri
Operation
Ri × Rj MDH, MDL
Flag Change
N: Set when the MSB of the "MDL" of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is zero, cleared otherwise.
V: Cleared when the operation result is in the range -2147483648 to 2147483647, cleared otherwise.
C: Unchanged.
Classification
Multiply/Divide Instruction
Execution Cycles
5 cycles
Instruction Format
NZVC
CCC-
MSB LSB
10101111 Rj Ri