Fujitsu FR81 Computer Hardware User Manual


 
CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 65
FR81 Family
CHAPTER 4 RESET AND "EIT" PROCESSING
4.9
4.9 Usage Sequence of General Interrupts
General interrupts accept interrupt requests from in-built peripheral functions and
external terminals, and perform EIT processing. The general points of caution of
programming while using general interrupts have been described here. Refer to the
hardware manual of various models as the detailed procedure differs as per the
peripheral function.
4.9.1 Preparation while using general interrupts
Before using general interrupts, settings for EIT processing need to be made. Perform the following settings
in the program beforehand.
Set values in the vector table (defined as data)
Set up the system stack pointer (SSP) values
Set up the table base register (TBR) value as the initial address in the vector table
Set a value of above 16(10000
B
) in the interrupt level mask register (ILM)
Set the value of "1" in the interrupt enable flag (I)
After the above settings, the settings of the peripheral functions are performed. In case of peripheral
functions which use general interrupts, two bits in the register of the peripheral functions require to be set -
a flag bit that indicates that a phenomenon which can become an interrupt source has occurred, and an
interrupt enable bit which uses this flag bit to enable or disable the interrupt request.
The peripheral function verifies the operation halt status, the disable of interrupt request, and that the flag
bit has been cleared. This state is achieved following a reset.
In case the peripheral function is engaged in some operation, the interrupt request is disabled and the flag
bit cleared after the operation of the peripheral function has been halted.
The interrupt level is set in the interrupt control register (ICR) of the interrupt controller. As multiple
interrupt control registers (ICR) are available corresponding to various vector numbers in the, please set an
interrupt control register (ICR) corresponding to the vector number of the interrupt begin used.
The operation of the peripheral function is resumed after clearing the flag bit and enabling the interrupt
request.