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254 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.79
● Calculation result and exception flag
[Multiplication]
*1: +INF/0, X or +0/U, X or +Norm/(X)
*2: -INF/0, X or -0/U, X or -Norm/(X)
[Addition]
*1: +INF/0 or -INF/0 or ± NorM/(X)
*2: ± 0/(-) or ± 0/U or ± Norm/(X)
FRj
+0 -0 +Norm -Norm +INF -INF QNaN SNaN
FRk
+0 +0/(-) -0/(-) +0/(-) -0/(-) QNaN/V QNaN/(-) QNaN/V
-0 -0/(-) +0/(-) -0/(-) +0/(-)
+Norm +0/(-) -0/(-) *1 *2 +INF/(-) -INF/(-)
-Norm -0/(-) +0/(-) *2 *1 -INF/(-) +INF/(-)
+INF QNaN/V +INF/(-) -INF/(-) +INF/(-) -INF/(-)
-INF -INF/(-) +INF/(-) -INF/(-) +INF/(-)
QNaN
SNaN
FRj
+0 -0 +Norm -Norm +INF -INF QNaN SNaN
FRk
+0 +0/(-) +Norm/(X) -Norm/(X) +INF/(-) -INF/(-) QNaN/(-) QNaN/V
-0 -0/(-)
+Norm +Norm/(X) *1 *2
-Norm -Norm/(X) *2 *1
+INF +INF/(-) QNaN/V
-INF -INF/(-) QNaN/V
QNaN
SNaN