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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 431
FR81 Family
APPENDIX
APPENDIX A Instruction Lists
is "0" and a minus extension is performed if MSB is "1".
&
Indicates logical calculation of each bit (AND)
|
Indicates the logical sum of each bit (OR)
^
Indicates Dedicated Logical Sum of each bit (EXOR)
( )
Indicates specification of indirect address. It is address memory read/write value of the Register or
formula within ( ).
{ }
Indicate the calculation priority. Since ( ) is used for specifying indirect address, different bracket
namely { } is used.
if (Condition) then {formula} or if (condition) then {Formula 1} else {Formula 2}
Indicates the execution of conditions. If the conditions are established, formula after ‘then’ is executed
and when the conditions are not established, formula next to ‘else’ is executed. Formula can be
described variously using the { }.
[m:n]
Bits from m to n are extracted and targeted for operation.
A.1.3 Format Column
Symbols used in the Format Column of the Instruction Lists.
A to N
Indicates the Instruction Formats. A to N correspond to TYPE-A to TYPE-N.
A.1.4 OP Column
Hexadecimal value used in the Instruction Lists. They denote operation codes (OP). They branch into the
following depending on the Instruction Format.
TYPE-A, TYPE-C, TYPE-D, TYPE-G
2-digit hexadecimal value represents 8-bit OP code