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FR81 Family
12 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 2 MEMORY ARCHITECTURE
2.2
2.2 Data Structure
FR81 Family CPU has three data types namely byte data (8-bits), half word data (16-bits)
and word data (32-bits). The byte order is big endian.
2.2.1 Byte Data
This is a data type having 8 bits as unit. Bit order is little endian, MSB side becomes bit7 and LSB side
becomes bit0. The structure of byte data is shown in Figure 2.2-1.
Figure 2.2-1
Structure of byte data
2.2.2 Half Word Data
This is a data type having 16 bits (2byte) as unit. Bit order is little endian, MSB side is bit15 while LSB
side is bit0. Bit15 to bit8 of MSB side represent the higher bytes while bit7 to bit0 of LSB side represent
the lower bytes. The structure of half word data is shown in Figure 2.2-2.
Figure 2.2-2
Structure of Half Word Data
2.2.3 Word Data
This is a data type having 32 bits (4byte) as unit. Bit order is little endian, MSB side is bit31 while LSB
side is bit0. Bit31 to bit16 of the MSB side become the higher half word, while bit15 to bit0 of the LSB
side become the lower half word. The structure of word data is shown in Figure 2.2-3.
Figure 2.2-3
Structure of Word Data
MSBbit76543210LSB
MSB
bit
Higher bytes Lower bytes
789101112131415 6543210
LSB
MSB
bit31
Higher half word Lower half word
16 1524 23 8 7 0
LSB