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FR81 Family
CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 471
Slot
Branching Instructions and Delay Slot ..................97
Software Interrupt
INT (Software Interrupt) ...................................271
INTE (Software Interrupt for Emulator)..............273
Source Register
ADD (Add Word Data of Source Register to
Destination Register)............................107
ADDC (Add Word Data of Source Register and Carry
Bit to Destination Register)...................111
ADDN (Add Word Data of Source Register to
Destination Register)............................115
AND (And Word Data of Source Register to Data
in Memory).........................................121
AND (And Word Data of Source Register to
Destination Register)............................123
ANDB (And Byte Data of Source Register to Data
in Memory).........................................125
ANDH (And Halfword Data of Source Register to
Data in Memory) .................................129
CMP (Compare Word Data in Source Register and
Destination Register)............................167
EOR (Exclusive Or Word Data of Source Register to
Destination Register)............................215
EOR (Exclusive Or Word Data of Source Register to
Data in Memory) .................................213
EORB (Exclusive Or Byte Data of Source Register to
Data in Memory) .................................217
EORH (Exclusive Or Halfword Data of Source
Register to Data in Memory).................219
MOV (Move Word Data in Source Register to
Destination Register)............334, 336, 340
MOV (Move Word Data in Source Register to
Program Status Register) ......................342
OR (Or Word Data of Source Register to Data
in Memory).........................................356
OR (Or Word Data of Source Register to Destination
Register) .............................................358
ORB (Or Byte Data of Source Register to Data
in Memory).........................................360
ORH (Or Halfword Data of Source Register to Data
in Memory).........................................364
SUB (Subtract Word Data in Source Register from
Destination Register)............................414
SUBC (Subtract Word Data in Source Register and
Carry bit from Destination Register)
..........................................................416
SUBN (Subtract Word Data in Source Register from
Destination Register)............................418
Special Usage
Special Usage of General-purpose Registers..........18
SRCH
SRCH0 (Search First Zero bit position distance From
MSB) .................................................373
SRCH1 (Search First One bit position distance From
MSB).................................................375
SRCHC
SRCHC (Search First bit value change position
distance From MSB)............................377
SSP
System Stack Pointer (SSP).................................27
ST
ST (Store Word Data in Program Status Register to
Memory) ............................................392
ST (Store Word Data in Register to Memory)
..........379, 381, 383, 385, 387, 389, 390
Stack flag
Interlock
ing produced by reference to R15 and
General-purpose Registers after Changing
the Stack flag (S flag) ............................75
Stack Pointer
ADDSP (Add Stack Pointer and Immediate Data)
..........................................................119
Relation between Stack Pointer and R15...............18
STB
STB (Store Byte Data in Register to Memory)
..................................394, 396, 398, 400
Step Division Instructions
Step Division Instructions .................................100
Step Trace
Step Trace Traps ................................................58
STH
STH (Store Halfword Data in Register to Memory)
..................................401, 403, 405, 407
STILM
STILM (Set Immediate Data to Interrupt Level Mask
Register).............................................408
STM
STM0 (Store Multiple Registers) .......................410
STM1 (Store Multiple Registers) .......................412
Store
ST (Store Word Data in Program Status Register to
Memory) ............................................392
ST (Store Word Data in Register to Memory)
..................379, 381, 383, 385, 387, 390
STB (Store Byte Data in Register to Memory)
..........................................394, 396, 398
STH (Store Halfword Data in Register to Memory)
..........................................401, 403, 405
STM0 (Store Multiple Registers) .......................410
STM1 (Store Multiple Registers) .......................412
SUB
SUB (Subtract Word Data in Source Register from
Destination Register) ...........................414