CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 105
FR81 Family
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.1
7.1 ADD (Add 4bit Immediate Data to Destination Register)
Adds the result of higher 28 bits of 4-bit immediate data with zero extension(0-15) and
stores the results to Ri.
● Assembler Format
ADD #i4, Ri
● Operation
Ri + extu(i4) → Ri
● Flag Change
N: Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is zero, cleared otherwise.
V: Set when an overflow has occurred as a result of the operation, cleared otherwise.
C: Set when a carry has occurred as a result of the operation, cleared otherwise.
● Classification
Add/Subtract Instruction, Instruction with delay slot
● Execution Cycles
1 cycle
● Instruction Format
NZVC
CCCC
MSB LSB
10100100 i4 Ri