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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 437
FR81 Family
APPENDIX
APPENDIX A Instruction Lists
Table A.2-8 Memory Load Instructions (16 Instructions)
• Relation of field o8 in the Instruction Format TYPE-B to the values disp8 to disp10 in assembly notation
is as follows.
o8 = disp8
o8 = disp9 >> 1
o8 = disp10 >> 2
• Relation of field u4 in the Instruction Format TYPE-C to the values udisp6 in assembly notation is as
follows.
u4 = udisp6 >> 2
• Relation of field u16 in the Instruction Format TYPE-J to the values udisp16 to udisp18 in assembly
notation is as follows.
u16 = udisp16
u16 = udisp17 >> 1
u16 = udisp18 >> 2
Mnemonic
Format OP CYC
FLAG
NZVC
RMW
Operation Remarks
Reference
LD @Rj, Ri A 04 b ---- - (Rj) → Ri
Word
7.98
LD @(R13, Rj), Ri A 00 b ---- - (R13+Rj) → Ri 7.99
LD @(R14, disp10), Ri B 20 b ---- - (R14+o8 × 4) → Ri 7.100
LD @(R15, udisp6), Ri C 03 b ---- - (R15+u4 × 4) → Ri 7.101
LD @R15+, Ri E 07-0 b ---- -
(R15) → Ri,
R15+4 → R15
7.102
LD @R15+, Rs E 07-8 b ---- -
(R15) → Rs,
R15+4 → R15
7.104
LD @R15+, PS E 07-9 1+a
CCCC
-
(R15) → PS,
R15+4 → R15
7.105
LD @(BP, udisp18), Ri J 07-4 a ---- - (BP+u16 × 4) → Ri 7.103
LDUH @Rj, Ri A 05 b ---- - extu((Rj)) → Ri
Half-
Word
Zero extension
7.115
LDUH @(R13, Rj), Ri A 01 b ---- - extu((R13+Rj)) → Ri 7.116
LDUH @(R14, disp9), Ri B 40 b ---- - extu((R14+o8 × 2)) → Rj 7.117
LDUH @(BP, udisp17), Ri J 07-5 a ---- - (BP+u16 × 2) → Ri 7.118
LDUB @Rj, Ri A 06 b ---- - extu((Rj)) → Ri
Byte
Zero extension
7.111
LDUB @(R13, Rj), Ri A 02 b ---- - extu((R13+Rj)) → Ri 7.112
LDUB @(R14, disp8), Ri B 60 b ---- - extu((R14+o8)) → Ri 7.113
LDUB @(BP, udisp16), Ri
J 07-6 a ---- - (BP+u16) → Ri 7.114