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FR81 Family
CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 463
Arithmetic shift
ASR (Arithmetic shift to the Right Direction)
..................................................131, 133
ASR2 (Arithmetic shift to the Right Direction)
..........................................................135
ASR
ASR (Arithmetic shift to the Right Direction)
..................................................131, 133
ASR2 (Arithmetic shift to the Right Direction)
..........................................................135
B
BANDH
BANDH (And 4bit Immediate Data to Higher 4bit of
Byte Data in Memory)..........................137
BANDL
BANDL (And 4bit Immediate Data to Lower 4bit of
Byte Data in Memory)..........................139
Bcc
Bcc (Branch relative if Condition satisfied).........141
Bcc:D
Bcc:D (Branch relative if Condition satisfied)
..........................................................143
BEORH
BEORH (Eor 4bit Immediate Data to Higher 4bit of
Byte Data in Memory)..........................145
BEORL
BEORL (Eor 4bit Immediate Data to Lower 4bit of
Byte Data in Memory)..........................147
BORH
BORH (Or 4bit Immediate Data to Higher 4bit of Byte
Data in Memory) .................................149
BORL
BORL (Or 4bit Immediate Data to Lower 4bit of Byte
Data in Memory) .................................151
Branch
Bcc (Branch relative if Condition satisfied).........141
Bcc:D (Branch relative if Condition satisfied)
..........................................................143
Branching
Delayed Branching Instructions ...........................97
Delayed branching processing..............................78
Example of branching with non-delayed branching
instructions ...........................................78
Example of processing of delayed branching
instruction.............................................79
Non-Delayed Branching Instructions ....................99
Specific example of Delayed Branching Instructions
............................................................98
Branching Instructions
Branching Instructions and Delay Slot ..................97
BTSTH
BTSTH (Test Higher 4bit of Byte Data in Memory)
..........................................................153
BTSTL
BTSTL (Test Lower 4bit of Byte Data in Memory)
..........................................................155
Bypassing
Register Bypassing.............................................74
Byte Data
ANDB (And Byte Data of Source Register to Data
in Memory).........................................125
BTSTH (Test Higher 4bit of Byte Data in Memory)
..........................................................153
BTSTL (Test Lower 4bit of Byte Data in Memory)
..........................................................155
Byte Data ..........................................................12
DMOVB (Move Byte Data from Direct Address to
Post Increment Register Indirect Address)
..........................................................199
DMOVB (Move Byte Data from Direct Address to
Register).............................................195
DMOVB (Move Byte Data from Post Increment
Register Indirect Address to Direct Address)
..........................................................201
DMOVB (Move Byte Data from Register to Direct
Address).............................................197
EORB (Exclusive Or Byte Data of Source Register to
Data in Memory)
................................217
EXTS
B (Sign Extend from Byte Data to Word Data)
..........................................................221
EXTSH (Sign Extend from Byte Data to Word Data)
..........................................................223
EXTUB (Unsign Extend from Byte Data to Word
Data)..................................................225
EXTUH (Unsign Extend from Byte Data to Word
Data)..................................................227
LDUB (Load Byte Data in Memory to Register)
..........................................306, 308, 310
ORB (Or Byte Data of Source Register to Data
in Memory).........................................360
STB (Store Byte Data in Register to Memory)
..........................................394, 396, 398
XCHB (Exchange Byte Data)............................420
Byte Order
Byte Order.........................................................13
C
CALL
CALL (Call Subroutine) ...........................157, 159
CALL:D
CALL:D (Call Subroutine)........................161, 163
Carry Bit
ADDC (Add Word Data of Source Register and Carry
Bit to Destination Register) ..................111