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410 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.166
7.166 STM0 (Store Multiple Registers)
The STM0 instruction stores the word data from multiple registers specified in reglist
(from R0 to R7) and repeats the operation of storing the result in address R15 after
subtracting the value of 4 from R15. Registers are processed in ascending order.
● Assembler Format
STM0 (reglist)
Registers from R0 to R7 are separated by "," , arranged and specified in reglist.
● Operation
The following operations are repeated according to the number of registers in reglist.
R15-4 → R15
Ri → (R15)
The bit values and register numbers for reglist (STM0) are shown in Table 7.166-1.
Table 7.166-1 Bit values and register numbers for reglist (STM0)
● Flag Change
N, Z, V, C: Unchanged.
Bit Register
7R0
6R1
5R2
4R3
3R4
2R5
1R6
0R7
NZVC
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