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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 39
CHAPTER 3 PROGRAMMING MODEL
3.3
3.3.16 Debug Register (DBR)
The debug register (DBR) is a dedicated register accessible only in the debug state. Writing to this register
other than in debug state is regarded as invalid.
Figure 3.3-31 shows the bit configuration of Debug Register (DBR).
Figure 3.3-31 Debug Register (DBR) Bit Configuration
bit31
bit0
Initial value
XXXX XXXX
H