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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 405
FR81 Family
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.163
7.163 STH (Store Halfword Data in Register to Memory)
Stores the half-word data in Ri to memory address R14 + o8 × 2. The value of o8 × 2 is
specified in disp9.
● Assembler Format
STH Ri,@(R14, disp9)
● Operation
Ri → (R14+o8×2)
● Flag Change
N, Z, V, C: Unchanged.
● Classification
Memory Store instruction, Instruction with delay slot
● Execution Cycles
a cycle
● Instruction Format
NZVC
----
MSB LSB
0101 o8 Ri