CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 167
FR81 Family
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.32
7.32 CMP (Compare Word Data in Source Register and
Destination Register)
Subtracts the word data in Rj from the word data in Ri, sets results in the flag of
condition code register (CCR).
● Assembler Format
CMP Rj, Ri
● Operation
Ri - Rj
● Flag Change
N: Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is zero, cleared otherwise.
V: Set when an overflow has occurred as a result of the operation, cleared otherwise.
C: Set when a borrow has occurred as a result of the operation, cleared otherwise.
● Classification
Compare instruction, Instruction with delay slot
● Execution Cycles
1 cycle
● Instruction Format
NZVC
CCCC
MSB LSB
10101010 Rj Ri