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FR81 Family
CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 33
CHAPTER 3 PROGRAMMING MODEL
3.3
The content of each bit are described below.
[bit31] E : E flag
This flag indicates that FRj and FRi are equal based on the floating point compare instruction
(FCMP) results.
[bit30] L : L flag
This flag indicates that FRi is less than FRj based on the floating point compare instruction (FCMP)
results.
[bit29] G : G flag
This flag indicates that FRi is greater than FRj based on the floating point compare instruction
(FCMP) results.
[bit28] U : U flag
This flag indicates that no comparison can be made (Unordered) based on the floating point compare
instruction (FCMP) results.
■ Rounding mode (RM)
Rounding mode (RM) is a 2-bit register that designates rounding mode of floating point calculation results.
It lies between bit 19 and bit 18 of the FPU control register (FCR). In FR81 Family CPU, only rounding up
to the nearest value (RM=00
B
) can be set.
Figure 3.3-24 shows the bit configuration of rounding mode (RM). Table 3.3-10 shows details of the
rounding mode.
Figure 3.3-24 Rounding mode (RM) Bit Configuration
Table 3.3-10 Rounding mode
bit19 bit18
RM1 RM0
Initial value
XX
B
RM
Rounding mode
00
B
The nearest value
01
B
0
10
B
+∞
11
B
-∞