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448 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
APPENDIX
APPENDIX A Instruction Lists
A.3 List of Instructions that can be positioned in the Delay Slot
This section shows the Instructions List that can be positioned in the delay slot of
Delay Branching Instruction.
● Add/Subtract Instructions
ADD Rj, Ri ADD #14, Ri ADD2 #i4, Ri
ADDC Rj, Ri ADDN Rj, Ri ADDN #i4, Ri
ADDN2 #i4, Ri SUB Rj, Ri SUBC Rj, Ri
SUBN Rj, Ri
● Compare Calculation Instructions
CMP Rj, Ri CMP #i4, Ri CMP2 #i4, Ri
● Logical Calculation Instructions
AND Rj, Ri OR Rj, Ri EOR Rj, Ri
● Multiply/ Divide Instructions
DIV0S Ri DIV0U Ri DIV1 Ri
DIV2 Ri DIV3 DIV4S
● Shift Instructions
LSL Rj, Ri LSL #u4, Ri LSL2 #u4, Ri
LSR Rj, Ri LSR #u4, Ri LSR2 #u4, Ri
ASR Rj, Ri ASR #u4, Ri ASR2 #u4, Ri
● Immediate Data Transfer Instructions
LDI:8 #i8, Ri
● Memory Load Instructions
LD @Rj, Ri LD @(R13, Rj), Ri LD @(R14, disp10), Ri
LD @(R15, udisp6), Ri LD @R15+, Ri LD @R15+, Rs