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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 171
FR81 Family
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.34
7.34 DIV0S (Initial Setting Up for Signed Division)
This is a step division instruction. This command issued for signed division in which
multiplication division register (MDL) contains the dividend and the Ri the divisor, with
the quotient stored in the MDL and the remainder in multiplication division register
(MDH).
● Assembler Format
DIV0S Ri
● Operation
MDL[31] → D0
MDL[31] ^ Ri[31] → D1
exts(MDL) → MDH, MDL
The word data in MDL is extended to 64 bits, with the higher word in the MDH and the lower word in the
MDL. The value of the sign bit in the MDL and Ri is used to set the D0 and D1 flag bits in the system
condition code register (SCR).
● Flag Change
N, Z, V, C: Flags unchanged.
D1: Set when the divisor and dividend signs are different, cleared when equal.
D0: Set when the dividend is negative, cleared when positive.
● Classification
Multiply/Divide Instruction
● Execution Cycles
1 cycle
N Z V C D1 D0
---- CC