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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 247
FR81 Family
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.75
7.75 FLD (Load Word Data in Memory to Floating Register)
Loads the word data at memory address BP+u16 × 4 to FRi. Unsigned u16 value is
calculated. The value in u16 × 4 is specified as udisp18.
● Assembler Format
FLD @(BP, udisp18), FRi
● Operation
(BP+u16 × 4) → FRi
● Flag Change
N, Z, V, C: Unchanged.
● Classification
Memory load instruction, FR81 family
● Execution Cycles
a cycle
● Instruction Format
● EIT Occurrence and Detection
A data access protection violation exception, an invalid instruction exception (a data access error or FPU
absence error), or an interrupt is detected.
NZVC
----
MSB LSB
(n+0)000001110111 FRi
(n+2) u16