FR81 Family
350 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.135
7.135 MULU (Multiply Unsigned Word Data)
Multiplies the word data in Rj by the word data in Ri as unsigned numbers and stores
the resulting unsigned 64-bit data with the higher word in the multiplication/division
register (MDH), and the lower word in the multiplication/division register (MDL).
● Assembler Format
MULU Rj, Ri
● Operation
Ri × Rj → MDH, MDL
● Flag Change
N: Set when the MSB of the MDL of the operation result is "1", cleared when the MSB is "0".
Z: Set when the MDL of the operation result is zero, cleared otherwise.
V: Cleared when the operation result is in the range 0 to 4294967295, set otherwise.
C: Unchanged.
● Classification
Multiply/Divide Instruction
● Execution Cycles
5 cycles
● Instruction Format
NZVC
CCC -
MSB LSB
10101011 Rj Ri