FR81 Family
416 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.169
7.169 SUBC (Subtract Word Data in Source Register and Carry
bit from Destination Register)
Subtracts word data in Rj and carry flag (C) from Ri, stores the results to Ri.
● Assembler Format
SUBC Rj, Ri
● Operation
Ri - Rj - C → Ri
● Flag Change
N: Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is "0", cleared otherwise.
V: Set when an overflow has occurred as a result of the operation, cleared otherwise.
C: Set when an borrow has occurred as a result of the operation, cleared otherwise.
● Classification
Add/Subtract instruction, Instruction with delay slot
● Execution Cycles
1 cycle
● Instruction Format
NZVC
CCCC
MSB LSB
10101101 Rj Ri