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FR81 Family
414 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.168
7.168 SUB (Subtract Word Data in Source Register from
Destination Register)
Subtracts the word data in Rj from the word data in Ri, stores the results to Ri.
● Assembler Format
SUB Rj, Ri
● Operation
Ri - Rj → Ri
● Flag Change
N: Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is zero, cleared otherwise.
V: Set when an overflow has occurred as a result of the operation, cleared otherwise.
C: Set when a borrow has occurred as a result of the operation, cleared otherwise.
● Classification
Add/Subtract instruction, Instruction with delay slot
● Execution Cycles
1 cycle
● Instruction Format
NZVC
CCCC
MSB LSB
10101100 Rj Ri