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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 53
FR81 Family
CHAPTER 4 RESET AND "EIT" PROCESSING
4.5
4.5 Interrupts
Interrupts originate independently of the instruction sequence. They are processed by
saving the necessary information to resume the currently executing instruction
sequence, and then starting the processing routine corresponding to the type of the
interrupt that has occurred interrupt.
Instruction loaded and executing in the CPU before the interrupt will be executed till completion. However
any instruction loaded in the pipeline after the interrupt will be cancelled. Hence, after completion of the
interrupt processing, processing will return to the instruction following the generation of the interrupt
signal.
The following four factors cause the generation of interrupts.
• General interrupts
• Non-maskable interrupt (NMI)
• Break interrupt
• Data access error interrupt
In case an interrupt is generated during the execution of stepwise division instructions, intermediate data is
saved to the program status (PS) to enable resumption of processing. Therefore, if the interrupt processing
program overwrites the contents of the program status (PS) data in the stack, the processor will resume the
normal instruction operations following resumption of processing. However the results of the division
calculation will be incorrect.
4.5.1 General interrupts
General interrupts originate as requests from in-built peripheral functions. Here, the in-built interrupt
controller present in devices and external interrupt control units have been described as one of the
peripheral functions.
The interrupt requests from various in-built peripheral functions are accepted via interrupt controller.
There are some interrupt requests which use external interrupt control unit, taking external terminals as
interrupt input terminals. Figure 4.5-1 shows the acceptance procedure of general interrupts.