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62 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
CHAPTER 4 RESET AND "EIT" PROCESSING
4.7
4.7.3 EIT Acceptance when Branching Instruction is Executed
No interrupts are accepted when a branching instruction is executed for delayed branching instruction.
Also, when an exception occurs in the delay slot, branching is cancelled, and the program counter (PC) for
branching instruction is saved. Interrupts and traps are accepted for delay slot instruction. Table 4.7-2
shows the EIT acceptance and saved PC value for branching instructions.
Table 4.7-2 EIT acceptance and saved PC value for branching instruction
EIT acceptance
instruction
Branching instruction Delay slot instruction
EIT type Exception Interrupt/trap Exception Interrupt/trap
Branching Delay slot Acceptance Saved PC
value
Acceptance Saved PC
value
Acceptance Saved PC
value
Acceptance Saved PC
value
Yes None ❍ PC ❍ Branching
destination
----
Yes ❍ PC ✕ - ❍ Branching
instruction
❍ Branching
destination
No None ❍ PC ❍ Subsequent
instruction
----
Yes ❍ PC ✕ - ❍ PC ❍ Subsequent
instruction