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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 243
FR81 Family
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.71
7.71 FLD (Single Precision Floating Point Data Load)
Loads the value at memory address R13+Rj to FRi.
● Assembler Format
FLD @(R13,Rj), FRi
● Operation
(R13 + Rj) → FRi
● Classification
Single-precision floating point instruction, FR81 family
● Execution Cycles
a cycle
● Instruction Format
● EIT Occurrence and Detection
A data access protection violation exception, an invalid instruction exception (a data access error or FPU
absence error), or an interrupt is detected.
MSB LSB
(n+0)000001111110 Rj
(n+2)---FRi